
26
AT/TSC8x251G2D
4135F–8051–11/06
Table 22.
Summary of Compare Instructions
Notes: 1. If this instruction addresses an I/O Port (Px, x = 0-3), add 1 to the number of states.
Add 2 if it addresses a Peripheral SFR.
2. If this instruction addresses external memory location, add N+2 to the number of
states (N: number of wait states).
3. If this instruction addresses external memory location, add 2(N+2) to the number of
states (N: number of wait states).
CompareCMP <dest>, <src>dest opnd - src opnd
Mnemonic
<dest>,
<src>
(2)
Comments
Binary Mode
Source Mode
Bytes
States
Bytes
States
CMP
Rmd, Rms
Register with register
3
2
1
WRjd,
WRjs
Word register with word register
3
2
DRkd,
DRks
Dword register with dword register
3
5
2
4
Rm, #data
Register with immediate data
4
3
2
WRj,
#data16
Word register with immediate 16-bit data
5
4
3
DRk,
#0data16
Dword register with zero-extended 16-bit
immediate data
5
645
DRk,
#1data16
Dword register with one-extended 16-bit
immediate data
5
645
Rm, dir8
Direct address (on-chip RAM or SFR) with
byte register
43(1)
32(1)
WRj, dir8
Direct address (on-chip RAM or SFR) with
word register
4
433
Rm, dir16
Direct address (64K) with byte register
5
3(2)
42(2)
WRj, dir16
Direct address (64K) with word register
5
4(3)
43(3)
Rm, at WRj Indirect address (64K) with byte register
4
3(2)
32(2)
Rm, at DRk Indirect address (16M) with byte register
4
4(2)
33(2)